Low power 16-bit multiplier design

Low power 16-bit multiplier design

The aim of this project is to investigate the design of different 16-bit CMOS Multiplier based on different logic and its implementation for portable low power applications. Arithmetic circuits such as digital adders and multipliers are used extensively in digital signal processor for filtering appl...

Saved in:

書目詳細資料
主要作者:	Heng, Zeng An
其他作者:	Gwee Bah Hwee
格式:	Final Year Project
語言:	English
出版:	2015
主題:	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
在線閱讀:	http://hdl.handle.net/10356/62023
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

相似書籍

Design a 16-bit Low power multiplier
由: Gu, Bin
出版: (2018)

16-bit low-power CMOS multiplier IC design
由: Zhang, Jingyao
出版: (2021)

Design a 16-bit low power delay multiplier
由: Lun, Yinghui
出版: (2021)

16-bit high speed CMOS multiplier IC design
由: He, Pengfei
出版: (2021)

16-bit high speed multiplier design
由: Yeo, Melvin Shung Shii
出版: (2014)

16 bits high speed CMOS multiplier IC design
由: Wut Yee Win Thoung
出版: (2021)

Low power-delay-product (PDP) CMOS multiplier design
由: Leng, Xiaoxiang
出版: (2021)

16-bit low power CMOS multiplier IC design
由: Hu, Hang
出版: (2020)

Design of the low-voltage CMOS analog multiplier
由: Guo, Lizao.
出版: (2012)

16-bit low-power CMOS multiplier IC design
由: Wang, Jun
出版: (2022)

Analysis and design of high speed low power 4-bit ALU
由: Huang, Si Wei.
出版: (2009)

16-bit low power multiplier design
由: Liew Tien Hong
出版: (2016)

Design of a 54x54-bit multiplier using radix-16 redundant binary booth encoding
由: Soh, Sing Yu.
出版: (2008)

Design of low-power and low-voltage VLSI multipliers
由: Ong, Geok Ling.
出版: (2008)

Design of a low-power asynchronous multiplier
由: Lim, Khoon Aun.
出版: (2008)

High speed 16-bit multiplier design
由: Zhou, Jiong.
出版: (2013)

High speed CMOS multiplier design
由: Tay, Wen Kai
出版: (2022)

A full-custom IC design flow high speed design using 16-bit full adder
由: Teo, Kok Xuan.
出版: (2012)

Design and analysis of redundant binary booth multipliers
由: He, Ya Juan
出版: (2010)

Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic
由: Ho, Weng-Geng, et al.
出版: (2013)

CMOS capacitor multiplier
由: Mirea Iulian.
出版: (2009)

Low power CMOS memory circuit design
由: Foo, Chee Heng
出版: (2020)

32-bit low-delay arithmetic-logic unit
由: Mu, Yihao
出版: (2022)

Low power low voltage adder cells for digital multiplier
由: Zhang, Mingyan
出版: (2008)

Adder and multiplier design for computing-in-memory architecture based on ReRAM
由: Zheng, Buyun
出版: (2023)

VHDL synthesis of Montgomery modular multiplier
由: Sarasvathi Thangaraju.
出版: (2008)

Frequency multiplier for 120 GHz signal source
由: Wang, Yong.
出版: (2013)

Low power ADC design
由: New, Jin Rui
出版: (2020)

Design of the low-voltage CMOS analog multiplier
由: Sun, Guoliang.
出版: (2008)

A high speed 16-bit CMOS multiplier IC design
由: Chen, Yin
出版: (2018)

Low complexity and low power FIR filter design
由: Ye, Wenbin
出版: (2014)

Low-power and robust SRAM design
由: Chen, Junchao.
出版: (2013)

Design of low-voltage low-power nano-scale SRAMs
由: Do, Anh Tuan
出版: (2011)

Design and analysis of an 8-bit SAR analog-digital converter
由: Wang, Ting.
出版: (2009)

High-speed and low-power serial accumulator for serial/parallel multiplier
由: Meher, Manas Ranjan, et al.
出版: (2010)

Design of a low-voltage CMOS analogue multiplier
由: Leow, Hee Boon.
出版: (2008)

Design of low power bandgap voltage reference
由: Wang, Daichao
出版: (2016)

A high speed 16-bit CMOS multiplier IC design
由: Wen, Zihao
出版: (2022)

Low power SAR ADC designs for sensing applications
由: Yang, Yongkui
出版: (2017)

Low power high performance CMOS adder design
由: Wen, Han
出版: (2019)