A high speed 16-bit CMOS multiplier IC design

A high speed 16-bit CMOS multiplier IC design

In this project, various multiplication algorithms are investigated and used to implement 16-bit CMOS multiplier design. And some common adders are also studied and developed using Verilog HDL language. By using different combination of algorithm and adder, we will study the performance of each 1...

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書目詳細資料
主要作者:	Chen, Yin
其他作者:	Gwee Bah Hwee
格式:	Final Year Project
語言:	English
出版:	2018
主題:	DRNTU::Engineering::Electrical and electronic engineering
在線閱讀:	http://hdl.handle.net/10356/76261
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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