Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process
Integration of silicon-complementary metal oxide-semiconductor (Si-CMOS) and III-V compound semiconductors (with device structures of either InGaAs HEMT, AlGaInP LED, GaN HEMT, or InGaN LED) on a common Si substrate is demonstrated. The Si-CMOS layer is temporarily bonded on a Si handle wafer. Anoth...
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sg-ntu-dr.10356-862692020-03-07T13:57:26Z Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process Lee, Kwang Hong Wang, Yue Wang, Bing Zhang, Li Sasangka, Wardhana Aji Goh, Shuh Chin Bao, Shuyu Lee, Kenneth E. Fitzgerald, Eugene A. Tan, Chuan Seng School of Electrical and Electronic Engineering Wafer Bonding Integration Integration of silicon-complementary metal oxide-semiconductor (Si-CMOS) and III-V compound semiconductors (with device structures of either InGaAs HEMT, AlGaInP LED, GaN HEMT, or InGaN LED) on a common Si substrate is demonstrated. The Si-CMOS layer is temporarily bonded on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. For GaN HEMT or LED on Si substrate, additional wafer bonding step is required to replace the fragile Si (111) substrate after high temperature GaN growth with a new Si (001) wafer to improve the robustness of the GaN/Si wafers. Through this substrate replacement step, the bonded wafer pair can survive the subsequent processing steps. The monolithic integration of Si-CMOS + III-V devices on a common Si platform enables new generation of systems with more functionality, better energy efficiency, and smaller form factor. NRF (Natl Research Foundation, S’pore) Published version 2018-07-26T07:25:44Z 2019-12-06T16:19:19Z 2018-07-26T07:25:44Z 2019-12-06T16:19:19Z 2017 Journal Article Lee, K. H., Wang, Y., Wang, B., Zhang, L., Sasangka, W. A., Goh, S. C., et al. (2018). Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process. IEEE Journal of the Electron Devices Society, 6, 571-578. 2168-6734 https://hdl.handle.net/10356/86269 http://hdl.handle.net/10220/45258 10.1109/JEDS.2017.2787202 en IEEE Journal of the Electron Devices Society © 2017 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information 8 p. application/pdf |
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Wafer Bonding Integration Lee, Kwang Hong Wang, Yue Wang, Bing Zhang, Li Sasangka, Wardhana Aji Goh, Shuh Chin Bao, Shuyu Lee, Kenneth E. Fitzgerald, Eugene A. Tan, Chuan Seng Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process |
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Integration of silicon-complementary metal oxide-semiconductor (Si-CMOS) and III-V compound semiconductors (with device structures of either InGaAs HEMT, AlGaInP LED, GaN HEMT, or InGaN LED) on a common Si substrate is demonstrated. The Si-CMOS layer is temporarily bonded on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. For GaN HEMT or LED on Si substrate, additional wafer bonding step is required to replace the fragile Si (111) substrate after high temperature GaN growth with a new Si (001) wafer to improve the robustness of the GaN/Si wafers. Through this substrate replacement step, the bonded wafer pair can survive the subsequent processing steps. The monolithic integration of Si-CMOS + III-V devices on a common Si platform enables new generation of systems with more functionality, better energy efficiency, and smaller form factor. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Lee, Kwang Hong Wang, Yue Wang, Bing Zhang, Li Sasangka, Wardhana Aji Goh, Shuh Chin Bao, Shuyu Lee, Kenneth E. Fitzgerald, Eugene A. Tan, Chuan Seng |
format |
Article |
author |
Lee, Kwang Hong Wang, Yue Wang, Bing Zhang, Li Sasangka, Wardhana Aji Goh, Shuh Chin Bao, Shuyu Lee, Kenneth E. Fitzgerald, Eugene A. Tan, Chuan Seng |
author_sort |
Lee, Kwang Hong |
title |
Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process |
title_short |
Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process |
title_full |
Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process |
title_fullStr |
Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process |
title_full_unstemmed |
Monolithic integration of Si-CMOS and III-V-on-Si through direct wafer bonding process |
title_sort |
monolithic integration of si-cmos and iii-v-on-si through direct wafer bonding process |
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2018 |
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https://hdl.handle.net/10356/86269 http://hdl.handle.net/10220/45258 |
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1681043939165995008 |