Jitter analysis of polyphase filter-based multiphase clock in frequency multiplier

• المؤلفون الرئيسيون: Yin, Jee Khoi, Chan, Pak Kwong
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2013
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/98674; http://hdl.handle.net/10220/16542
• المؤسسة: Nanyang Technological University

This paper presents the random jitter and deterministic jitter analysis on the proposed polyphase filter (PPF)-based multiphase clock in frequency multiplier with reference to the benchmark jitter analysis of the multiphase clock counterpart using conventional delay-locked loop (DLL) approach. The a...