Border-trap characterization in high-κ strained-Si MOSFETs

Border-trap characterization in high-κ strained-Si MOSFETs

10.1109/LED.2007.902086

Saved in:
Bibliographic Details
Main Authors: Maji, D., Duttagupta, S.P., Rao, V.R., Yeo, C.C., Cho, B.-J.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
1/f noise
Border traps
Charge pumping
Hysteresis
Interface trapping
Strained-Si
Online Access:http://scholarbank.nus.edu.sg/handle/10635/82018
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: National University of Singapore
id sg-nus-scholar.10635-82018
record_format dspace
spelling sg-nus-scholar.10635-820182023-10-26T22:07:55Z Border-trap characterization in high-κ strained-Si MOSFETs Maji, D. Duttagupta, S.P. Rao, V.R. Yeo, C.C. Cho, B.-J. ELECTRICAL & COMPUTER ENGINEERING 1/f noise Border traps Charge pumping Hysteresis Interface trapping Strained-Si 10.1109/LED.2007.902086 IEEE Electron Device Letters 28 8 731-733 EDLED 2014-10-07T04:24:25Z 2014-10-07T04:24:25Z 2007-08 Article Maji, D., Duttagupta, S.P., Rao, V.R., Yeo, C.C., Cho, B.-J. (2007-08). Border-trap characterization in high-κ strained-Si MOSFETs. IEEE Electron Device Letters 28 (8) : 731-733. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2007.902086 07413106 http://scholarbank.nus.edu.sg/handle/10635/82018 000248315400021 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic 1/f noise
Border traps
Charge pumping
Hysteresis
Interface trapping
Strained-Si
spellingShingle 1/f noise
Border traps
Charge pumping
Hysteresis
Interface trapping
Strained-Si
Maji, D.
Duttagupta, S.P.
Rao, V.R.
Yeo, C.C.
Cho, B.-J.
Border-trap characterization in high-κ strained-Si MOSFETs
description 10.1109/LED.2007.902086
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
Maji, D.
Duttagupta, S.P.
Rao, V.R.
Yeo, C.C.
Cho, B.-J.
format Article
author Maji, D.
Duttagupta, S.P.
Rao, V.R.
Yeo, C.C.
Cho, B.-J.
author_sort Maji, D.
title Border-trap characterization in high-κ strained-Si MOSFETs
title_short Border-trap characterization in high-κ strained-Si MOSFETs
title_full Border-trap characterization in high-κ strained-Si MOSFETs
title_fullStr Border-trap characterization in high-κ strained-Si MOSFETs
title_full_unstemmed Border-trap characterization in high-κ strained-Si MOSFETs
title_sort border-trap characterization in high-κ strained-si mosfets
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/82018
_version_ 1781784041356263424

Similar Items