Border-trap characterization in high-κ strained-Si MOSFETs

Border-trap characterization in high-κ strained-Si MOSFETs

10.1109/LED.2007.902086

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Bibliographic Details
Main Authors: Maji, D., Duttagupta, S.P., Rao, V.R., Yeo, C.C., Cho, B.-J.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
1/f noise
Border traps
Charge pumping
Hysteresis
Interface trapping
Strained-Si
Online Access:http://scholarbank.nus.edu.sg/handle/10635/82018
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Institution: National University of Singapore

Internet

http://scholarbank.nus.edu.sg/handle/10635/82018

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