Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices

10.1149/1.2727393

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Bibliographic Details
Main Authors:	Zang, H., Loh, W.Y., Oh, H.J., Choi, K.J., Nguyen, H.S., Lo, G.Q., Cho, B.J.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/83827
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-83827
record_format	dspace
spelling	sg-nus-scholar.10635-838272015-01-09T07:04:04Z Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices Zang, H. Loh, W.Y. Oh, H.J. Choi, K.J. Nguyen, H.S. Lo, G.Q. Cho, B.J. ELECTRICAL & COMPUTER ENGINEERING 10.1149/1.2727393 ECS Transactions 6 1 105-110 2014-10-07T04:45:38Z 2014-10-07T04:45:38Z 2007 Conference Paper Zang, H.,Loh, W.Y.,Oh, H.J.,Choi, K.J.,Nguyen, H.S.,Lo, G.Q.,Cho, B.J. (2007). Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices. ECS Transactions 6 (1) : 105-110. ScholarBank@NUS Repository. <a href="https://doi.org/10.1149/1.2727393" target="_blank">https://doi.org/10.1149/1.2727393</a> 9781566775502 19385862 http://scholarbank.nus.edu.sg/handle/10635/83827 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
description	10.1149/1.2727393
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Zang, H. Loh, W.Y. Oh, H.J. Choi, K.J. Nguyen, H.S. Lo, G.Q. Cho, B.J.
format	Conference or Workshop Item
author	Zang, H. Loh, W.Y. Oh, H.J. Choi, K.J. Nguyen, H.S. Lo, G.Q. Cho, B.J.
spellingShingle	Zang, H. Loh, W.Y. Oh, H.J. Choi, K.J. Nguyen, H.S. Lo, G.Q. Cho, B.J. Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices
author_sort	Zang, H.
title	Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices
title_short	Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices
title_full	Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices
title_fullStr	Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices
title_full_unstemmed	Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices
title_sort	improved current drivability and gate stack integrity using buried sic layer for strained si/sige channel devices
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/83827
_version_	1681089507504422912

Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices

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