Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode

10.1016/j.sse.2004.05.045

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Bibliographic Details
Main Authors:	Zhu, S., Yu, H.Y., Chen, J.D., Whang, S.J., Chen, J.H., Shen, C., Zhu, C., Lee, S.J., Li, M.F., Chan, D.S.H., Yoo, W.J., Du, A., Tung, C.H., Singh, J., Chin, A., Kwong, D.L.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/83906
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-83906
record_format	dspace
spelling	sg-nus-scholar.10635-839062024-11-13T14:46:39Z Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode Zhu, S. Yu, H.Y. Chen, J.D. Whang, S.J. Chen, J.H. Shen, C. Zhu, C. Lee, S.J. Li, M.F. Chan, D.S.H. Yoo, W.J. Du, A. Tung, C.H. Singh, J. Chin, A. Kwong, D.L. ELECTRICAL & COMPUTER ENGINEERING 10.1016/j.sse.2004.05.045 Solid-State Electronics 48 10-11 SPEC. ISS. 1987-1992 SSELA 2014-10-07T04:46:34Z 2014-10-07T04:46:34Z 2004-10 Conference Paper Zhu, S., Yu, H.Y., Chen, J.D., Whang, S.J., Chen, J.H., Shen, C., Zhu, C., Lee, S.J., Li, M.F., Chan, D.S.H., Yoo, W.J., Du, A., Tung, C.H., Singh, J., Chin, A., Kwong, D.L. (2004-10). Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode. Solid-State Electronics 48 (10-11 SPEC. ISS.) : 1987-1992. ScholarBank@NUS Repository. https://doi.org/10.1016/j.sse.2004.05.045 00381101 http://scholarbank.nus.edu.sg/handle/10635/83906 000223809700053 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1016/j.sse.2004.05.045
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Zhu, S. Yu, H.Y. Chen, J.D. Whang, S.J. Chen, J.H. Shen, C. Zhu, C. Lee, S.J. Li, M.F. Chan, D.S.H. Yoo, W.J. Du, A. Tung, C.H. Singh, J. Chin, A. Kwong, D.L.
format	Conference or Workshop Item
author	Zhu, S. Yu, H.Y. Chen, J.D. Whang, S.J. Chen, J.H. Shen, C. Zhu, C. Lee, S.J. Li, M.F. Chan, D.S.H. Yoo, W.J. Du, A. Tung, C.H. Singh, J. Chin, A. Kwong, D.L.
spellingShingle	Zhu, S. Yu, H.Y. Chen, J.D. Whang, S.J. Chen, J.H. Shen, C. Zhu, C. Lee, S.J. Li, M.F. Chan, D.S.H. Yoo, W.J. Du, A. Tung, C.H. Singh, J. Chin, A. Kwong, D.L. Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
author_sort	Zhu, S.
title	Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
title_short	Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
title_full	Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
title_fullStr	Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
title_full_unstemmed	Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
title_sort	low temperature mosfet technology with schottky barrier source/drain, high-k gate dielectric and metal gate electrode
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/83906
_version_	1821199947045797888

Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode

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