Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrode
10.1016/j.sse.2004.05.045
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Main Authors: | Zhu, S., Yu, H.Y., Chen, J.D., Whang, S.J., Chen, J.H., Shen, C., Zhu, C., Lee, S.J., Li, M.F., Chan, D.S.H., Yoo, W.J., Du, A., Tung, C.H., Singh, J., Chin, A., Kwong, D.L. |
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Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Conference or Workshop Item |
Published: |
2014
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Online Access: | http://scholarbank.nus.edu.sg/handle/10635/83906 |
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Institution: | National University of Singapore |
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