Ultra-narrow silicon nanowire gate-all-around CMOS devices: Impact of diameter, channel-orientation and low temperature on device performance
10.1109/IEDM.2006.346840
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Main Authors: | Singh, N., Lim, F.Y., Fang, W.W., Rustagi, S.C., Bera, L.K., Agarwal, A., Tung, C.H., Hoe, K.M., Omampuliyur, S.R., Tripathi, D., Adeyeye, A.O., Lo, G.Q., Balasubramanian, N., Kwong, D.L. |
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Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Conference or Workshop Item |
Published: |
2014
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Online Access: | http://scholarbank.nus.edu.sg/handle/10635/84334 |
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Institution: | National University of Singapore |
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