Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV)

• Main Authors: Lin, Ye, Li, Hong Yu, Tan, Chuan Seng
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2020
• Subjects: Engineering::Electrical and electronic engineering::Semiconductors; Electrical Characteristics; TSV
• Online Access: https://hdl.handle.net/10356/144088
• Institution: Nanyang Technological University

In this work, a new design of 3-D MIM capacitor embedded in partially-filled TSV is proposed and evaluated. The electrical characteristics of 3-D MIM capacitors confirm that the new design effectively mitigates the process-induced thermo-mechanical stress between TSV Cu core and the surrounding structures. The leakage current at a bias of 3 V is reduced from 1.85 mA for a fully-filled (=30μm), test vehicle to 13.58 pA for a partially-filled test vehicle (=40μm), which is comparable to the leakage current of 4.61 pA for a planar MIM capacitor. An ultra-high capacitance of 6,449.0 nF/μm2 is also achieved for the 3-D MIM capacitor embedded in the partially filled 40 μm TSV.