Effects of vacancies on device performance
A process to fabricate sub-nanometer MOS transistor, is being demonstrated through an ion implantation step by the TSUPREM4 process simulator and MEDICI device simulator. The main objective of this report is to investigate the effects of the vacancies on device performance. Crystalline (100) silicon...
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| Format: | Final Year Project |
| Language: | English |
| Published: |
2009
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| Online Access: | http://hdl.handle.net/10356/17983 |
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| Institution: | Nanyang Technological University |
| Language: | English |