Realistic modeling of electromigration in today’s ULSI interconnections
IC architecture makes extensively use of multiple interconnect levels with many vias that enable electrical current to flow between each level. A common failure mechanism in interconnections is the formation and the growth of voids and/or hillocks which may span across the line width and sever (or s...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2009
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/18900 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |