Realistic modeling of electromigration in today’s ULSI interconnections

Realistic modeling of electromigration in today’s ULSI interconnections

IC architecture makes extensively use of multiple interconnect levels with many vias that enable electrical current to flow between each level. A common failure mechanism in interconnections is the formation and the growth of voids and/or hillocks which may span across the line width and sever (or s...

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書目詳細資料
主要作者:	Li, Wei
其他作者:	Tan Cher Ming
格式:	Theses and Dissertations
語言:	English
出版:	2009
主題:	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
在線閱讀:	https://hdl.handle.net/10356/18900
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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