An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads

An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads

Parallel graph-oriented applications expressed in the Bulk-Synchronous Parallel (BSP) and Token Dataflow compute models generate highly-structured communication workloads from messages propagating along graph edges. We can statially expose this structure to traffic compilers and optimization tools t...

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書目詳細資料
Main Authors:	Kapre, Nachiket, Dehon, André
其他作者:	School of Computer Engineering
格式:	Article
語言:	English
出版:	2015
主題:	Computer Science and Engineering
在線閱讀:	https://hdl.handle.net/10356/81118 http://hdl.handle.net/10220/39124
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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