Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM
We propose a novel 15-T Transmission-gate-based Non-Imprinting High-speed Erase (TNIHE) SRAM cell with emphases on low area overhead and low stand-by power attributes for highly secured data storage applications. We benchmark our proposed 15-T TNIHE SRAM cell against the reported 22-T Non-Imprinting...
Saved in:
Main Authors: | Ho, Weng-Geng, Ne, Kyaw Zwa Lwin, Prashanth Srinivas, Nagarajan, Chong, Kwen-Siong, Kim, Tony Tae-Hyoung, Gwee, Bah Hwee |
---|---|
Other Authors: | School of Electrical and Electronic Engineering |
Format: | Conference or Workshop Item |
Language: | English |
Published: |
2016
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/83999 http://hdl.handle.net/10220/41565 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing
by: Chen, Junchao, et al.
Published: (2016) -
Ultra-low voltage SRAM for IoT applications
by: Cai, Yanru
Published: (2024) -
0.2 V 8T SRAM With PVT-Aware Bitline Sensing and Column-Based Data Randomization
by: Do, Anh Tuan, et al.
Published: (2016) -
A 0.4 V 12T 2RW dual-port SRAM with suppressed common-row-access disturbance
by: Wang, Bo, et al.
Published: (2018) -
SRAM based computing-in-memory for tiny machine learning
by: Gupta, Shini
Published: (2024)