Enhanced low-power high-speed probabilistic adders for error-toerant application
In modern VLSI technology, the occurrence of all kinds of errors has become inevitable. To overcome all the possible errors is a very expensive task. It not only consumes a lot of power but also degrades the speed performance. With the concept of “error-tolerant” (ET), which allows the existence of...
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Main Author: | Zhu, Ning |
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Other Authors: | Goh Wang Ling |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2011
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/46273 |
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Institution: | Nanyang Technological University |
Language: | English |
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