Sensing margin enhancement techniques for ultra-low-voltage SRAMs utilizing a bitline-boosting current and equalized bitline leakage

Sensing margin enhancement techniques for ultra-low-voltage SRAMs utilizing a bitline-boosting current and equalized bitline leakage

A small bitline sensing margin is one of the most challenging design obstacles for reliable ultra-low-voltage static random access memory (SRAM) implementation. This paper presents design techniques for bitline sensing margin enhancement using decoupled SRAMs. The proposed bitline-boosting current s...

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書目詳細資料
Main Authors:	Do, Anh Tuan, Nguyen, Truc Quynh, Yeo, Kiat Seng, Kim, Tony Tae-Hyoung
其他作者:	School of Electrical and Electronic Engineering
格式:	Article
語言:	English
出版:	2013
主題:	DRNTU::Engineering::Electrical and electronic engineering
在線閱讀:	https://hdl.handle.net/10356/95955 http://hdl.handle.net/10220/11361
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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