Embedded polysilicon gate MOSFET

Embedded polysilicon gate MOSFET

US6252277

Saved in:

Bibliographic Details
Main Authors:	CHAN, LAP, CHA, CHER LIANG, CHOR, ENG FONG, HAO, GONG, LEE, TECK KOON
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Patent
Published:	2012
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/32594
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	National University of Singapore

Similar Items

Effects of microtrenching from polysilicon gate patterning on 0.13μm MOSFET device performance
by: Chua, C.S., et al.
Published: (2014)

Method and apparatus to image metallic patches embedded in a non-metal surface
by: CHA, CHER LIANG RANDALL, et al.
Published: (2012)

Hot-carrier reliability of n- and p-channel MOSFETs with polysilicon and CVD tungsten-polycide gate
by: Lou, C.L., et al.
Published: (2014)

Hot-carrier induced degradation of polysilicon and tungsten polycide gate MOSFETs under maximum substrate and gate current stresses
by: Lou, C.L., et al.
Published: (2014)

Size effect of embedded nanocrystals in floating gate MOSFET devices
by: Cheng, X.Z., et al.
Published: (2014)

Method to fabricate a double-polysilicon gate structure for a sub-quarter micron self-aligned-titanium silicide process
by: PEY, KIN-LEONG, et al.
Published: (2012)

In-line plasma induced charging monitor for 0.15μm polysilicon gate etching
by: Chong, D., et al.
Published: (2014)

Characteristics of high-κ spacer offset-gated polysilicon TFTs
by: Xiong, Z., et al.
Published: (2014)

Impact of nitrogen implantation into polysilicon followed by drive-in process on gate oxide integrity
by: Cho, B.J., et al.
Published: (2014)

Reduction of carrier depletion in p+ polysilicon gates using laser thermal processing
by: Chong, Y.F., et al.
Published: (2014)

Method to form narrow and wide shallow trench isolations with different trench depths to eliminate isolation oxide dishing
by: CHAN, LAP, et al.
Published: (2012)

A new polysilicon CMOS self-aligned double-gate TFT technology
by: Xiong, Z., et al.
Published: (2014)

Reduction of Polysilicon Gate Depletion Effect in NMOS Devices Using Laser Thermal Processing
by: Chong, Y.F., et al.
Published: (2014)

Dual metal gate process by metal substitution of dopant-free polysilicon on high-K dielectric
by: Park, C.S., et al.
Published: (2014)

Carbon-doped polysilicon floating gate for improved data retention and P/E window of flash memory
by: Pu, J., et al.
Published: (2014)

Evaluation of silicon nitride and silicon carbide as efficient polysilicon grain-growth inhibitors
by: Cha, C.L., et al.
Published: (2014)

Structure effects in the gate-all-around silicon nanowire MOSFETs
by: Liang, G.
Published: (2014)

Reverse short channel effects in nMOSFETs
by: Lee, Teck Koon.
Published: (2008)

Metal gate work function engineering on gate leakage of MOSFETs
by: Hou, Y.-T., et al.
Published: (2014)

A novel self-aligned offset-gated polysilicon TFT using high-κ dielectric spacers
by: Xiong, Z., et al.
Published: (2014)

Strong low-frequency noise in polysilicon emitter bipolar transistors with interfacial oxide due to fluctuations in tunneling probabilities
by: Lau, Wai Shing, et al.
Published: (2014)

Investigation of Performance Limits of Germanium Double-Gated MOSFETs
by: Low, T., et al.
Published: (2014)

Modelling of the "Gated-diode" configuration in bulk MOSFET's
by: Yip, A., et al.
Published: (2014)

MODELING THE WAVE FUNCTION ON SURROUNDING-GATE-MOSFET
by: Iqbal Ibrahim, Mohammad

Schottky-barrier S/D MOSFETs with high-K gate dielectrics and metal-gate electrode
by: Zhu, S., et al.
Published: (2014)

Fatigue behavior of polysilicon nanowires.
by: Tan, Loo Ling.
Published: (2009)

Numerical study of the dependence of unity gain bandwidth fT on polysilicon emitter in bipolar transistors
by: Chor, E.F., et al.
Published: (2014)

Tunable Oxide-Bypassed Trench Gate MOSFET: Breaking the Ideal Superjunction MOSFET Performance Line at Equal Column Width
by: Yang, X., et al.
Published: (2014)

The effects of polysilicon dopant depletion and Fowler-Nordheim tunnelling on the characteristics of N+ polysilicon-oxide-silicon capacitors
by: Ling, C.H., et al.
Published: (2014)

Study of breakdown in ultrathin gate dielectrics in nanoscale MOSFETs
by: Lo, Vui Lip
Published: (2010)

Gate Dielectric-Breakdown-Induced Microstructural Damage in MOSFETs
by: Tang, L.J., et al.
Published: (2014)

HOT-CARRIER EFFECTS IN THIN GATE OXIDE MOSFET'S
by: SEE LENG KIAN
Published: (2020)

Impact of decoupled plasma nitridation of ultra-thin gate oxide on the performance of p-channel MOSFETs
by: Lek, C.M., et al.
Published: (2014)

Method for forming self-aligned elevated transistor
by: CHAN, LAP, et al.
Published: (2012)

Method to fabricate a large planar area ONO interpoly dielectric in flash device
by: CHAN, LAP, et al.
Published: (2012)

Dual nanowire silicon MOSFET with silicon bridge and TaN gate
by: Theng, A. L., et al.
Published: (2010)

Analytical and numerical studies of the dependence of high frequency performance on the use of a polysilicon emitter in bipolar transistors
by: Chor, E.F., et al.
Published: (2014)

Gate-first germanium nMOSFET with CVD HfO2 gate dielectric and silicon surface passivation
by: Wu, N., et al.
Published: (2014)

Schottky s/d MOSFETs with high-Kgate dielectrics and metal gate electrodes
by: Zhu, S., et al.
Published: (2014)

Germanium pMOSFETs With Schottky-barrier Germanide S/D, high-Κ gate dielectric and metal gate
by: Zhu, S., et al.
Published: (2014)