Through-silicon-via (TSV) design, fabrication and characterization for 3D IC applications
Three-dimensional (3D) integration is identified as a key and promising path, not only to facilitate the continuation of the conventional scaling, but also to enable the “More-than- Moore” heterogeneous integration of a vast different functionalities into a system in a single chip form. By using 3D...
Saved in:
Main Author: | Zhang, Lin |
---|---|
Other Authors: | Li Hong Yu |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2014
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/61734 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Dielectric quality of 3D capacitor embedded in through-silicon via (TSV)
by: Lin, Ye, et al.
Published: (2020) -
Electromigration study of through silicon via (TSV)
by: Tan, Yeow Chong
Published: (2011) -
Leakage current conduction mechanism in 3D capacitor embedded in Through-Silicon Via (TSV)
by: Lin, Ye, et al.
Published: (2020) -
Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV)
by: Lin, Ye, et al.
Published: (2020) -
Fabrication and characterization of through silicon via interconnects for 3D IC packages
by: Huang, Weiqin.
Published: (2009)