Optimization of reliability of copper column flip chip packages with variable compliance interconnects
10.1109/EPTC.2007.4469820
Saved in:
Main Authors: | Tay, A.A.O., Ho, S.L. |
---|---|
Other Authors: | MECHANICAL ENGINEERING |
Format: | Conference or Workshop Item |
Published: |
2014
|
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/73728 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Similar Items
-
Optimization of copper column flip chip packages incorporating a variable interconnect compliance configuration
by: Tay, A.A.O., et al.
Published: (2014) -
Optimization of reliability of copper-low-k flip chip package with variable interconnect compliance
by: Ong, J.M.G., et al.
Published: (2014) -
Optimization of flip chip interconnect reliability using a variable compliance interconnect design
by: Tay, A.A.O., et al.
Published: (2014) -
Numerical analysis on compliance and electrical behavior of multi-copper-column flip-chip interconnects for wafer-level packaging
by: Liao, E.B., et al.
Published: (2014) -
Optimization of reliability of wafer level copper column interconnections using a variable compliance interconnect design
by: Tay, A.A.O., et al.
Published: (2014)