Custom FPGA-based soft-processors for sparse graph acceleration
FPGA-based soft processors customized for operations on sparse graphs can deliver significant performance improvements over conventional organizations (ARMv7 CPUs) for bulk synchronous sparse graph algorithms. We develop a stripped-down soft processor ISA to implement specific repetitive operations...
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主要作者: | Kapre, Nachiket |
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其他作者: | School of Computer Engineering |
格式: | Conference or Workshop Item |
語言: | English |
出版: |
2015
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在線閱讀: | https://hdl.handle.net/10356/81243 http://hdl.handle.net/10220/39162 |
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