Source / Drain Engineering in InGaAs n-MOSFETs for Logic Device Applications
Ph.D
Saved in:
Main Author: | SUJITH SUBRAMANIAN |
---|---|
Other Authors: | NUS GRAD SCH FOR INTEGRATIVE SCI & ENGG |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2014
|
Subjects: | |
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/118211 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Language: | English |
Similar Items
-
InGaAs N-MOSFETS with CMOS Compatible Source/Drain Technology and the Integration on Si Platform
by: IVANA
Published: (2013) -
Contact and source/drain engineering for advanced III-V field-effect transistors
by: KONG YU JIN EUGENE
Published: (2014) -
INGAAS QUANTUM-WELL MOSFETS ON SILICON SUBSTRATES FOR NEXT-GENERATION LOGIC & MIXED-SIGNAL APPLICATIONS
by: SACHIN
Published: (2017) -
Investigation of Pd-InGaAs for the formation of self-aligned source/drain contacts in InGaAs metal-oxide-semiconductor field-effect transistors
by: Kong, E.Y.-J., et al.
Published: (2014) -
Lattice-mismatched In0.4Ga0.6As Source/Drain stressors with In Situ doping for strained In0.53 Ga0.47 as channel n-MOSFETs
by: Chin, H.-C., et al.
Published: (2014)