Bed of nails: Fine pitch wafer-level packaging interconnects for high performance nano devices

• Main Authors: Rao, V.S., Kripesh, V., Yoon, S.W., Witarsa, D., Tay, A.A.O.
• Other Authors: MECHANICAL ENGINEERING
• Format: Conference or Workshop Item
• Published: 2014
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/85887
• Institution: National University of Singapore

Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005