Modelling temperature dependence on AlGaN/GaN power HEMT device characteristics

by Wang, Y.-H., Liang, Y.C., Samudra, G.S., Chang, T.-F., Huang, C.-F., Yuan, L., Lo, G.-Q.
Published 2014

Inversion-mode self-aligned In0.53Ga0.47 As N-channel metal-oxide-semiconductor field-effect transistor with HfAlO gate dielectric and TaN metal gate

by Lin, J.Q., Lee, S.J., Oh, H.J., Lo, G.Q., Kwong, D.L., Chi, D.Z.
Published 2014

Low thermal budget monolithic integration of evanescent-coupled Ge-on-SOI photodetector on Si CMOS platform

by Ang, K.-W., Liow, T.-Y., Yu, M.-B., Fang, Q., Song, J., Lo, G.-Q., Kwong, D.-L.
Published 2014

Experimental demonstration of optical switch using gradient optical force

by Ding, L., Song, J. F., Yu, M. B., Lo, G. Q., Kwong, D. L., Cai, H., Tao, J. F.
Published 2014

A MEMS platform for 2-D fine-positioning and locking of optical ball-lens in silicon photonics packaging

by Zhang, Q.X., Du, Y., Tan, C.W., Zhang, J., Yu, M.B., Lo, G.Q., Kwong, D.L.
Published 2014

A novel MEMS configuration for three dimensional fine positioning and mechanical fixing of a ball lens in the packaging of silicon photonics

by Zhang, Q.X., Du, Y., Tan, C.W., Zhang, J., Yu, M.B., Lo, G.Q., Kwong, D.L.
Published 2014

Performance breakthrough in 8 nm gate length gate-all-around nanowire transistors using metallic nanowire contacts

by Jiang, Y., Liow, T.Y., Singh, N., Tan, L.H., Lo, G.Q., Chan, D.S.H., Kwong, D.L.
Published 2014

Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability

by Jiang, Y., Liow, T.Y., Singh, N., Tan, L.H., Lo, G.Q., Chan, D.S.H., Kwong, D.L.
Published 2014

Uniaxial strained silicon n-FETs on silicon-germanium-on-insulator substrates with an e-Si0.7Ge0.3 stress transfer layer and source/drain stressors for performance enhancement

by Wang, G.H., Toh, E.-H., Foo, Y.-L., Tripathy, S., Balakumar, S., Lo, G.-Q., Samudra, G., Yeo, Y.-C.
Published 2014

Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices

by Zang, H., Loh, W.Y., Oh, H.J., Choi, K.J., Nguyen, H.S., Lo, G.Q., Cho, B.J.
Published 2014

Wavelength-flattened directional coupler based mid-infrared chemical sensor using bragg wavelength in subwavelength grating structure

by Dong, B, Hu, T, Luo, X, Chang, Y, Guo, X, Wang, H, Kwong, D.-L, Lo, G.-Q, Lee, C
Published 2020

A lens holder in conjunction with a MEMS platform for on-chip aligning and fixing of a ball lens in silicon photonics packaging

by Zhang, Q.X., Du, Y., Tan, C.W., Zhang, J., Yu, M.B., Lo, G.-Q., Kwong, D.-L.
Published 2014

Enhanced sensitivity of small-size (with 1-μm gate length) junction-field-effect-transistor-based germanium photodetector using two-step germanium epitaxy by ultrahigh vacuum chemi...

by Wang, J., Zang, H., Yu, M.B., Xiong, Y.Z., Lo, G.Q., Kwong, D.L., Lee, S.J.
Published 2014

SiGe amorphization during Ge condensation in silicon germanium on insulator

by Balakumar, S., Lo, G.Q., Tung, C.H., Kumar, R., Balasubramanian, N., Kwong, D.L., Ong, C.S., Li, M.F.
Published 2014

Strained Si/SiGe channel with buried Si0.99C0.01 for improved drivability, gate stack integrity and noise performance

by Loh, W.-Y., Zang, H., Oh, H.-J., Choi, K.-J., Nguyen, H.S., Lo, G.-Q., Cho, B.J.
Published 2014

Strained silicon-germanium-on-insulator n-channel transistor with silicon source and drain regions for performance enhancement

by Wang, G.H., Toh, E.-H., Tung, C.-H., Du, A., Lo, G.-Q., Samudra, G., Yeo, Y.-C.
Published 2014

Nickel salicided source/drain extensions for performance improvement in ultrascaled (Sub 10 nm) Si-nanowire transistors

by Jiang, Y., Liow, T.Y., Singh, N., Tan, L.H., Lo, G.Q., Chan, D.S.H., Kwong, D.L.
Published 2014

Solid phase epitaxy during Ge condensation from amorphous SiGe layer on silicon-on-insulator substrate

by Balakumar, S., Tung, C.H., Lo, G.Q., Kumar, R., Balasubramanian, N., Kwong, D.L., Fei, G., Lee, S.J.
Published 2014

Strained silicon-germanium-on-insulator N-MOSFETs featuring lattice mismatched source/drain stressor and high-stress silicon nitride liner

by Wang, G.H., Toh, E.-H., Toh, Hoe, K.M., Tripathy, S., Balakurnar, S., Lo, G.-Q., Samudra, G., Yeo, Y.-C.
Published 2014

Self-consistent Schrödinger-Poisson simulations on capacitance-voltage characteristics of silicon nanowire gate-all-around MOS devices with experimental comparisons

by Chin, S.K., Ligatchev, V., Rustagi, S.C., Zhao, H., Samudra, G.S., Singh, N., Lo, G.Q., Kwong, D.-L.
Published 2014