Design, fabrication, and characterization of three-dimensional embedded capacitor in through-silicon via
In this thesis, a novel integrated capacitor, called “three-dimensional (3-D) embedded capacitor” is proposed, designed, fabricated, and characterized for application in integrated circuits (ICs) with through-silicon vias (TSVs). A significant capacitance density enhancement can be achieved for this...
Saved in:
Main Author: | Lin, Ye |
---|---|
Other Authors: | Tan Chuan Seng |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2019
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/102666 http://hdl.handle.net/10220/48586 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Modeling, fabrication, and characterization of 3-D capacitor embedded in through-silicon via
by: Lin, Ye, et al.
Published: (2020) -
Leakage current conduction mechanism of three-dimensional capacitors embedded in through-silicon vias
by: Lin, Ye, et al.
Published: (2020) -
Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV)
by: Lin, Ye, et al.
Published: (2020) -
Dielectric quality of 3D capacitor embedded in through-silicon via (TSV)
by: Lin, Ye, et al.
Published: (2020) -
Three-dimensional capacitor embedded in fully Cu-filled through-silicon via and its thermo-mechanical reliability for power delivery applications
by: Lin, Ye, et al.
Published: (2020)