3D simulation and fabrication of multiple-gate device
Master's
Saved in:
Main Author: | TEE KIAN MENG |
---|---|
Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2010
|
Subjects: | |
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/14982 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Language: | English |
Similar Items
-
Simulation of multiple gate FinFET device gate capacitance and performance with gate length and pitch scaling
by: Zhao, H., et al.
Published: (2014) -
Drive-current enhancement in FinFETs using gate-induced stress
by: Tan, K.-M., et al.
Published: (2014) -
Random telegraph signal noise in gate-all-around Si-FinFET with ultranarrow body
by: Lim, Y.F., et al.
Published: (2014) -
Self-consistent Schrödinger-Poisson simulations on capacitance-voltage characteristics of silicon nanowire gate-all-around MOS devices with experimental comparisons
by: Chin, S.K., et al.
Published: (2014) -
Self-consistent Schrödinger-Poisson simulations on capacitance-voltage characteristics of silicon nanowire gate-all-around MOS devices with experimental comparisons
by: Chin, S.K., et al.
Published: (2014)