Device physics and performance optimization of impact-ionization metal-oxide-semiconductor transistors formed using a double-spacer fabrication process
10.1143/JJAP.47.3077
Saved in:
Main Authors: | Toh, E.-H., Wang, G.H., Chan, L., Samudra, G.S., Yeo, Y.-C. |
---|---|
Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Article |
Published: |
2014
|
Subjects: | |
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/55628 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Similar Items
-
A double-spacer I-MOS transistor with shallow source junction and lightly doped drain for reduced operating voltage and enhanced device performance
by: Toh, E.-H., et al.
Published: (2014) -
I-MOS transistor with an elevated silicon-germanium impact-ionization region for bandgap engineering
by: Toh, E.-H., et al.
Published: (2014) -
Strain and materials engineering for the I-MOS transistor with an elevated impact-ionization region
by: Toh, E.-H., et al.
Published: (2014) -
Simulation, modelling and fabrication of novel devices with steep subthreshold slope
by: TOH ENG HUAT
Published: (2010) -
Cointegration of in situ doped silicon-carbon source and silicon-carbon I-region in P-channel silicon nanowire impact-ionization transistor
by: Toh, E.-H., et al.
Published: (2014)