Metal gate technology for nanoscale transistors - Material selection and process integration issues
10.1016/j.tsf.2004.05.039
Saved in:
Main Author: | Yeo, Y.-C. |
---|---|
Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Article |
Published: |
2014
|
Subjects: | |
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/56607 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Similar Items
-
Hf-based high-K gate dielectric and metal gate stack for advanced CMOS devices
by: JOO MOON SIG
Published: (2010) -
Advanced gate stacks for nano-scale CMOS technology
by: WANG XINPENG
Published: (2010) -
Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning
by: Park, C.S., et al.
Published: (2014) -
Work function and process integration issues of metal gate materials in CMOS technology
by: REN CHI
Published: (2011) -
Metal gate with high-K dielectric in Si CMOS processing
by: PARK CHANG SEO
Published: (2010)