Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest

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書目詳細資料
主要作者:	Yeo, Y.-C.
其他作者:	ELECTRICAL & COMPUTER ENGINEERING
格式:	Conference or Workshop Item
出版:	2014
在線閱讀:	http://scholarbank.nus.edu.sg/handle/10635/70189
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	National University of Singapore

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