Quantum mechanical modeling of gate capacitance and gate current in tunnel dielectric stack structures for nonvolatile memory application
10.1063/1.1691170
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Main Authors: | Koh, B.H., Chim, W.K., Ng, T.H., Zheng, J.X., Choi, W.K. |
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Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Article |
Published: |
2014
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Online Access: | http://scholarbank.nus.edu.sg/handle/10635/82952 |
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Institution: | National University of Singapore |
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