Device physics and guiding principles for the design of double-gate tunneling field effect transistor with silicon-germanium source heterojunction

Device physics and guiding principles for the design of double-gate tunneling field effect transistor with silicon-germanium source heterojunction

10.1063/1.2823606

Saved in:

Bibliographic Details
Main Authors:	Toh, E.-H., Wang, G.H., Chan, L., Samudra, G., Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/55627
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	National University of Singapore

Similar Items

Device design and scalability of a double-gate tunneling field-effect transistor with silicon - germanium source
by: Toh, E.-H., et al.
Published: (2014)

Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
by: Toh, E.-H., et al.
Published: (2014)

Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
by: Han, G., et al.
Published: (2014)

Strained silicon-germanium-on-insulator n-channel transistor with silicon source and drain regions for performance enhancement
by: Wang, G.H., et al.
Published: (2014)

Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applications
by: Toh, E.-H., et al.
Published: (2014)

Source/drain doping influence on heterojunction graphene nanoribbon tunneling field effect transistors
by: Da, H., et al.
Published: (2014)

Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate
by: Han, G., et al.
Published: (2014)

Strain optimization in ultrathin body transistors with silicon-germanium source and drain stressors
by: Madan, A., et al.
Published: (2014)

Device physics and design of a L-shaped germanium source tunneling transistor
by: Low, K.L., et al.
Published: (2014)

I-MOS transistor with an elevated silicon-germanium impact-ionization region for bandgap engineering
by: Toh, E.-H., et al.
Published: (2014)

Concept of strain-transfer-layer and integration with graded silicon-germanium source/drain stressors for p-type field effect transistor performance enhancement
by: Wang, G.H., et al.
Published: (2014)

Strained silicon-germanium-on-insulator n-MOSFET with embedded silicon source-and-drain stressors
by: Wang, G.H., et al.
Published: (2014)

Strained n-channel transistors with silicon source and drain regions and embedded silicon/germanium as strain-transfer structure
by: Ang, K.-W., et al.
Published: (2014)

ADVANCED SOURCE AND DRAIN CONTACT ENGINEERING FOR GERMANIUM-TIN AND SILICON-GERMANIUM TRANSISTORS
by: XU HAIWEN
Published: (2023)

Influence of contact doping on graphene nanoribbon heterojunction tunneling field effect transistors
by: Da, H., et al.
Published: (2014)

Strained silicon nanowire transistors with germanium source and drain stressors
by: Liow, T.-Y., et al.
Published: (2014)

Impact ionization nanowire transistor with multiple-gates, silicon-germanium impact ionization region, and sub-5 mV/decade subtheshold swing
by: Toh, E.-H., et al.
Published: (2014)

Silicon nano-wire impact ionization transistors with multiple-gates for enhanced gate control and performance
by: Toh, E.-H., et al.
Published: (2014)

Graphene nanoribbon tunneling field-effect transistors with a semiconducting and a semimetallic heterojunction channel
by: Da, H., et al.
Published: (2014)

Investigation of Performance Limits of Germanium Double-Gated MOSFETs
by: Low, T., et al.
Published: (2014)

Novel extended-Pi shaped silicon - germanium source/drain stressors for strain and performance enhancement in p-channel tri-gate fin-type field-effect transistor
by: Tan, K.-M., et al.
Published: (2014)

Germanium multiple-gate field-effect transistors formed on germanium-on-insulator substrate
by: Liu, B., et al.
Published: (2014)

Sub 50nm strained n-FETs formed on silicon-germanium-on-insulator substrates and the integration of silicon source/drain stressors
by: Wang, G.H., et al.
Published: (2014)

Strained silicon-germanium-on-insulator N-MOSFETs featuring lattice mismatched source/drain stressor and high-stress silicon nitride liner
by: Wang, G.H., et al.
Published: (2014)

Strain Engineering for Advanced Silicon, Germanium and Germanium-Tin Transistors
by: CHENG RAN
Published: (2014)

Simulation and design of a germanium L-shaped impact-ionization MOS transistor
by: Toh, E.-H., et al.
Published: (2014)

Lattice strain analysis of transistor structures with silicon-germanium and silicon-carbon sourcedrain stressors
by: Ang, K.-W., et al.
Published: (2014)

Planar and multiple-gate transistors with silicon-carbon source/drain
by: Yeo, Y.-C.
Published: (2014)

Silicon-germanium-tin (SiGeSn) source and drain stressors formed by Sn implant and laser annealing for strained silicon-germanium channel P-MOSFETs
by: Wang, G.H., et al.
Published: (2014)

Germanium multiple-gate field-effect transistor with in situ boron-doped raised source/drain
by: Liu, B., et al.
Published: (2014)

Scaling Parameter Dependent Drain Induced Barrier Lowering Effect in Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor
by: Samudra, G., et al.
Published: (2014)

Scaling Parameter Dependent Drain Induced Barrier Lowering Effect in Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor
by: Samudra, G., et al.
Published: (2014)

Finite-element study of strain distribution in transistor with silicon-germanium source and drain regions
by: Yeo, Y.-C., et al.
Published: (2014)

Cointegration of in situ doped silicon-carbon source and silicon-carbon I-region in P-channel silicon nanowire impact-ionization transistor
by: Toh, E.-H., et al.
Published: (2014)

Planar Double-Gate Transistor
by: Amara Amara, Olivier Rozeau
Published: (2017)

A double-spacer I-MOS transistor with shallow source junction and lightly doped drain for reduced operating voltage and enhanced device performance
by: Toh, E.-H., et al.
Published: (2014)

Source/drain germanium condensation for P-channel strained ultra-thin body transistors
by: Chui, K.-J., et al.
Published: (2014)

Germanium tin tunneling field-effect transistor for sub-0.4 v operation
by: Yang, Y., et al.
Published: (2014)

Uniaxial strained silicon n-FETs on silicon-germanium-on-insulator substrates with an e-Si0.7Ge0.3 stress transfer layer and source/drain stressors for performance enhancement
by: Wang, G.H., et al.
Published: (2014)

Polarity control in WSe2 double-gate transistors
by: Resta, G.V, et al.
Published: (2020)