Interface configuration and Fermi-level pinning of fully silicided gate and high-K dielectric stack
10.1116/1.2198849
Saved in:
| Main Authors: | , , , , |
|---|---|
| Other Authors: | |
| Format: | Article |
| Published: |
2014
|
| Online Access: | http://scholarbank.nus.edu.sg/handle/10635/56367 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Institution: | National University of Singapore |