Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric
10.1109/IEDM.2009.5424354
Saved in:
Main Authors: | Oh, H.J., Lin, J.Q., Suleiman, S.A.B., Lo, G.Q., Kwong, D.L., Chi, D.Z., Lee, S.J. |
---|---|
Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Conference or Workshop Item |
Published: |
2014
|
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/84301 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Similar Items
-
Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack
by: Lin, J., et al.
Published: (2014) -
Interface engineering for InGaAs n-MOSFET application using plasma PH 3-N2 passivation
by: Oh, H.-J., et al.
Published: (2014) -
Inversion-mode self-aligned In0.53Ga0.47 As N-channel metal-oxide-semiconductor field-effect transistor with HfAlO gate dielectric and TaN metal gate
by: Lin, J.Q., et al.
Published: (2014) -
A self-aligned Ni-InGaAs contact technology for InGaAs channel n-MOSFETs
by: Zhang, X., et al.
Published: (2014) -
Study on interfacial properties of InGaAs and GaAs integrated with chemical-vapor-deposited high- k gate dielectrics using x-ray photoelectron spectroscopy
by: Oh, H.J., et al.
Published: (2014)