A dual-metal gate integration process for CMOS with sub-1-nm EOT HfO2 by using HfN replacement gate

• Main Authors: Ren, C., Yu, H.Y., Kang, J.F., Wang, X.P., Ma, H.H.H., Yeo, Y.-C., Chan, D.S.H., Li, M.-F., Kwong, D.-L.
• Other Authors: ELECTRICAL & COMPUTER ENGINEERING
• Format: Article
• Published: 2014
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/81863
• Institution: National University of Singapore

10.1109/LED.2004.832535